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Job Openings

Job Title: ASIC Design Verification Engineer

                    San Jose, California

Provide design verification services for our SoC


  • Test bench development using System Verilog UVM

  • Test plan and test case development with functional coverage, assertion, coverage property, coverage groups and coverage collections

  • Regression setup and debug at RTL level and gate sim level working with design team



  • 10+ Design Verification experience

  • Deep knowledge about System Verilog, UVM and verification coverage matrix

  • Familiar with Synopsys PCIe/CXL VIP and Mentor Graphics QVIP

  • Strong experience with PCIe/CXL protocol (PHY/DLLP/TLP)

  • Very familiar with the peripheral protocols such as UART, I2C, SPI Flash

  • Proficient in Perl scripting

Job Title: ASIC Design Engineer

                    San Jose, California

Provide design services for our SoC


  • Participate in architecture definition and modeling.

  • Contribute to micro-architecture specification and reviews.

  • Review industry standard specs and ensure IPs are kept up to date for compliance.

  • Define design partitioning for efficient IP/sub-system/full chip implementation.

  • Review and provide feedback on verification plans and methodology.

  • Drive block/chip/system level development and execution.

  • Work with Hard IP designers, verification, validation, Firmware engineers and architects to produce thoroughly verified, robust IP.

  • Actively participate in post-silicon bring-up, validation and compliance testing.



  • 10 – 15 years of experience in logic design using Verilog/System Verilog

  • Proven track record of taking several chips in from product definition to production.

  • Experience in complex ASIC design.

  • Good understanding of ASIC design and verification methodologies and flows.

  • Excellent understanding of standard ASIC design techniques, including:

  • Architecture/Micro-architecture definition

  • Design partitioning and Hard IP interactions

  • Multiple async clock domain designs

  • Design for test

  • Clock/Reset

  • Power aware

  • Excellent understanding of Synthesis, STA, CDC, Lint, LEC

  • Very strong domain knowledge about PCIe/CXL

  • Very familiar with the peripheral protocols such as UART, I2C, SPI Flash

  • Proficient in Perl scripting

Job Title: QA/Quality Engineer

                    San Jose, California


Xconn Technologies is seeking an experienced QA/Quality Engineer to join our team. The position will play a leading role in the development, implementation, and management of our quality assurance system along with overseeing product quality of our semiconductor components. The position involves working internally with the various functions within Xconn along with our subcontractors/manufacturing partners to achieve the highest standards of quality assurance and product quality. Activities will also involve interfacing with customers.



The responsibilities of this position involve but are not limited to the following areas.

Quality Assurance:

Develop, implement, and maintain a comprehensive Quality Management System (QMS) that is compliant with ISO2001:2015 requirements. Write related QA and product quality processes, procedures, and specifications and work internally with other functions for alignment of their documents to ISO standards. Manage and respond to customer information requests. Drive continuous improvement initiatives to enhance overall product quality, manufacturing processes, and efficiency. Work internally and with our supply base to do so. Manage activities involving CAR’s/PAR’s and 8D reporting and other quality related activities. Generate regular reports on quality metrics, trends, and performance for review by management.


Product Quality:

Establish and maintain product quality benchmarks, specifications and acceptance criteria. Oversee product qualifications plans and execution for alignment and achievement of the quality and reliability specifications. Write product reliability reports for conditional and full production releases. Collaborate with cross-functional teams to identify and resolve quality issues throughout the product development life cycle. Handle the customer RMA process. Work internally, with our supply base, and with outside FA labs as required to determine failure mode and root cause. Implement corrective and preventive actions to prevent recurrences. Collaborate with regulatory affairs to ensure compliance with relevant industry regulations and standards.


BS in Electrical Engineering, Mechanical Engineering, or a related field with 7+ years’ experience in QA and Product Quality in the semiconductor industry. Experience in implementing a complete Quality Management System (QMS) to ISO 9001 requirements along with creating associated documents and maintaining the system. Experience in the quality and reliability requirements for semiconductor components with alignment to industry standards. 

Job Title: SoC Architect

                    San Jose, California

Role and Responsibilities

The SoC Architect is a senior technical leader in the company, steering the capability progression of our leading-edge switch SoC and innovating to keep our products the technology leader in the market. The SoC Architect takes up the hardware architecture end-to-end lifecycle ownership of our SoC products.

  • You will collaborate with our marketing and business development teams to identify use cases with impactful value for customers.

  • You will collaborate with all the technical teams (RTL, Physical Design, Systems, Software) to deliver new SoC architecture features and defining the Soft/Hardware Co-Designs to efficiently enable such use cases.

  • You will perform detailed performance analysis of the architecture features, applications, benchmarks, power-performance-area trade-off. Where applicable, you will employ performance modeling for complex use cases.

  • You will exercise your domain expertise in one or multiple areas. These include Embedded CPU Subsystem, Platform Security, PCIe Interconnect, CXL Interconnect, Ethernet Interconnect, Data Network Switching, Power Management.

  • You will be authoring the hardware specifications and architectural validation plan.

  • You will review the downstream specifications and verification plans in ASIC, software and/or platform to ensure requirements are fulfilled.

  • You will participate in the workgroups of different industry groups, including PCI-SIG, CXL, OCP, JEDEC, DMTF and other HPC and AI workgroups.

  • You will apply for patents for the novel technologies in our architecture.

  • Post-Silicon production support with silicon debug and publishing of customer documentation.

  • You will also support the publication of customer documentation such as datasheets and programming guides.

  • You will also support various post-silicon operations.



  • 10+ years of experience with a Master’s Degree in Electrical/Computer Engineering/Computer Science, or 8+ years of experience with a PhD Degree.

  • Proven track record of successful deployment of architectures/architecture features in SoC products.

  • Exceptional analytic, written, and verbal skills and the ability to work as part of a team and motivation the collaboration of a diverse set of technical teams.

  • Proficiency in evaluating architecture proposals, 3rd party IP features and software/system algorithms and providing innovative guidance.

  • Good ability in architecture analysis and system modeling

  • Deep knowledge of the PCIe and CXL standards.

  • Deep experience in defining security architecture for SoCs.

  • Deep experience in ARM CPU subsystem architecture, including memory subsystem design, cache subsystems and software debug architecture.

  • Experience with the Linux OS including drivers, as well as BIOS is a plus

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